cache coherence meaning in Chinese
高速缓存相干
高速缓存一致性
Examples
- In multiprocessors systems , cache coherence is always an important issue
在多处理器计算机系统中， cache一致性一直是一个重要的问题。 - Dividing the cache into separating tag and data arrays reduces the access time of the cache . in order to keep the cache coherence , ccu adopts moesi protocol
Lx ? 1164具有独立的32kb片内数据高速缓存和32kb片内指令高速缓存，通过ccu可以同时对指令cache和数据cache进行查询。 - In this paper , we made some analysis on conventional cache coherence protocols . we provide one way to reduce remote access delay - adding a router - cache in routing components
本文首先对常用的cache一致性协议进行了分析，提出了一种在多处理器系统中减少远程访问延时的方式一在路由部件中加入存储部件一路由器cache 。 - This policy is novel in the sense that it adopts befitting policies for different network connections with different optimization aims , and provides support for cache coherence upon transition between different situations
该策略在不同网络连接下分别采用更适合的作法，同时考虑了不同连接及断接状态间转换这些特殊情况，并对缓存项视图渐进维护。 - Then , we give some description about the working principle , organization , function of router - cache and where it should be . we also gave out a cache coherence protocol for multiprocessors systems with router - caches
本文接着描述了路由器cache的工作原理，对其的组织、在系统中的位置、应有的功能等方面进行了讨论，并设计了含有路由器cache的多处理器系统的cache一致性协议。